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2 Mbit SPI Serial Flash
A Microchip Technology Company
SST25LF020A
Not Recommended for New Designs
Write Protect Pin (WP#)
The Write Protect (WP#) pin enables the lock-down function of the BPL bit (bit 7) in the status register.
When WP# is driven low, the execution of the Write-Status-Register (WRSR) instruction is determined
by the value of the BPL bit (see Table 2). When WP# is high, the lock-down function of the BPL bit is
disabled.
Table 2: Conditions to execute Write-Status-Register (WRSR) Instruction
WP#
L
L
H
BPL
1
0
X
Execute WRSR Instruction
Not Allowed
Allowed
Allowed
T2.0 25080
Status Register
The software status register provides status on whether the flash memory array is available for any
Read or Write operation, whether the device is Write enabled, and the state of the memory Write pro-
tection. During an internal Erase or Program operation, the status register may be read only to deter-
mine the completion of an operation in progress. Table 3 describes the function of each bit in the
software status register.
Table 3: Software Status Register
Default at
Bit
0
Name
BUSY
Function
1 = Internal Write operation is in progress
Power-up
0
Read/Write
R
0 = No internal Write operation is in progress
1
WEL
1 = Device is memory Write enabled
0
R
0 = Device is not memory Write enabled
2
BP0
Indicate current level of block write protection (See
1
R/W
Table 4)
3
BP1
Indicate current level of block write protection (See
1
R/W
Table 4)
4:5
6
RES
AAI
Reserved for future use
Auto Address Increment Programming status
0
0
N/A
R
1 = AAI programming mode
0 = Byte-Program mode
7
BPL
1 = BP1, BP0 are read-only bits
0
R/W
0 = BP1, BP0 are read/writable
T3.0 25080
Busy
The Busy bit determines whether there is an internal Erase or Program operation in progress. A “1” for
the Busy bit indicates the device is busy with an operation in progress. A “0” indicates the device is
ready for the next valid operation.
?2011 Silicon Storage Technology, Inc.
7
DS25080A
11/11
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